Engineering Support Platform (ESP)


ESP is a Rapid Prototyping Solution

ESP, or Engineering Support Platform, is a low cost, powerful and versatile platform for the development, deployment and support of FPGA Applications. ESP is powered by DSX core, ARC’s core element for the development and deployment of digital and mixed signal systems. The standard system contains 2 custom FPGA system, often configured in combination where one acts as the application firmware, and the other is used for test. But the system is expandable and configurable in any combination to solve any problem in a digital, analog or mixed signal system. The FPGAs can be configured to generate, analyze, process and/or output complex signals at a wide range of voltages, frequencies and serial protocols. It has been used to develop solutions for Radar systems, testers, Pattern Generation, digital signal processing and generating, Video processing, and many more. ESP comes as a desktop or rack mounted solution, and no special interfaces are needed.

Rapid Deployment Powered by DSX

At the heart of the ESP system is the DSX – Digital Synthesis for the next generation of rapid FPGA deployment. DSX-Core is an index-card-sized CCA with a Kintex-7 FPGA from Xilinx, USB interface, power supplies and Samtec board-to-board connectors. The DSX-Core can be plugged into any compatible carrier CCA to provide interfaces for custom applications. The standard ESP contains 2 DSX modules, making it extremely powerful and customizable.

Cost-Efficient Test-Driven Development

For ARC, ESP has quickly become a necessary tool for managing our growing array of complex technical insertion programs. Having a system of firmware, hardware and software solutions that is universal to our company’s development culture, regardless of the problem being solved, enables engineers to quickly move from one project to another. Engineers can support each other with little ramp-up time, work anywhere in a completely secure environment, and work in parallel without waiting for another group to deliver a complete design before moving on. The ESP design lends itself by nature to Test-driven development, and any project always has built in self test functionality without any additional development time.


Using ESP, ARC engineers have found a way to bring the Agile design philosophy into the hardware development process. Our software team can use ESP to emulate the hardware of system and start developing firmware and software solutions before the ink is even dry on the hardware team’s designs. With no schedule compression, critical customer feedback can be addressed early in the project. Once the hardware is in “synthetic form”, the FPGA IP can be ported to reduce effort needed for future obsolescence, and through the nature of the product, every solution has a self-test built into the process. Additionally, ESP uses Xilinx Kintex-7 technology, AMD-Xilinx recently announced that these popular devices will be supported at least until 2035.

100% Secure

At each power-up or project change, the appropriate firmware is loaded into the device. Using our unique dual FPGA firmware structure, we are able to use the same hardware for any number of applications. Because of this, when the device is powered off, all data is deleted from the ARC ESP in its entirety. Any IP is completely secure when loaded onto the ESP device.

Analog Box Upgrade

Add a wide range of Analog functionality to your solutions with our rack mounted Analog Box. The ESP Analog Box can support up to 7 independent clock signals, ranging from frequencies as low as 1/2 Hertz all the way up to 50 Megahertz. The expansion supports a wide range of Voltage outputs and provides 120 additional inputs, as well as five 50 pin Samtec connectors.

ESP’s customizability allows it to excel in a variety of industries


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